Unit No |
Details |
No. of Lectures |
|---|---|---|
| 1 | Functional blocks of a computer: CPU, memory, input-output subsystems, control unit.
Instruction set architecture of a CPU–registers, instruction execution cycle, RTL interpretation of
instructions, addressing modes, instruction set. Case study – instruction sets of some common
CPUs. Data representation: signed number representation, fixed and floating point representations, character representation. Computer arithmetic – integer addition and subtraction, ripple carry adder, carry look-ahead adder, etc. multiplication – shift-and-add, Booth multiplier, carry save multiplier, etc. Division restoring and non-restoring techniques, floating point arithmetic. |
2 |
| 2 | Introduction to x86 architecture. CPU control unit design: hardwired and micro- programmed
design approaches, Case study – design of a simple hypothetical CPU. Memory system design:
semiconductor memory technologies, memory organization. Peripheral devices and their characteristics: Input-output subsystems, I/O device interface, I/O transfers–program controlled, interrupt driven and DMA, privileged and non-privileged instructions, software interrupts and exceptions. Programs and processes–role of interrupts in process state transitions, I/O device interfaces – SCII, USB. |
|
| 3 | Pipelining: Basic concepts of pipelining, throughput and speedup, pipeline hazards. Parallel Processors: Introduction to parallel processors, Concurrent access to memory and cache coherency |
|
| 4 | Memory organization: Memory interleaving, concept of hierarchical memory organization, cache memory, cache size vs. Block size, mapping functions, replacement algorithms, write policies. |
| Unit | Study Materials |
|---|---|
| 1 | [Cache-1(Video) ] | [Cache-2 (Video) ] [Memory Interfacing ] [ Pipelining 1 ] [ Pipelining 2 ] [ Pipelining 3 ] [ Pipelining 4 ] [ Virtual Memory ] |
| 2 | [DMA Controller ] | [Isolated I/O and Memmory Mapped I/O ] [Data Transfer Techniques ] [Flynn's Classification for Computer Architecture ] [RISC and CISC ] [I/O subsystem ] [Bus Handshaking ] |
[Q_Set(1) ]
[Assignment 1 ]
[Quiz 1 ] | [Quiz 2 ] | [Marks Obtained ]